1. Technical Field
The present invention relates to the field of graphics controllers, and in particular to systems for analyzing the performance of graphic controllers.
2. Background Art
Real-time observations of events/operations within a graphics controller provide useful feedback on the efficiency of the graphics hardware and the software that controls it. Information such as the average number of graphics instructions in a queue, the latency of a specified graphics operation, the frequency of texture cache misses, and the frequency with which a specific graphics resource is stalled may be used by both hardware and software designers to improve system performance. For example, an 80% hit rate on a texture cache may indicate that the cache size needs to be increased, and a relatively high latency for a data transfer between a graphics resource and a graphics surface, e.g. the Z buffer, may indicate a need to modify the channel between them.
In many instances, understanding performance bottlenecks requires relatively complex operations. For example, pinpointing pathological operations may require detecting "handshake" signals between different pairs of graphics resources or concurrent transactions between different pairs of resources. Collisions between these concurrent transactions can indicate device or instruction interactions that are not apparent when monitoring either event separately. Latency experiments must track the time difference between the arrival of a request signal and the completion of the requested action. Where multiple resources share a transaction queue, it may be difficult to disentangle signals for the different resources, and complex analyses of available signals may be required to obtain the desired information.
Currently available methods for monitoring events in graphics hardware are limited by the types of signals that can be observed and the ease with which observations can be made. Logic analyzers are general purpose devices that can be set up to monitor the state of selected external signal lines when a specified instruction is detected. Here, "external signals" refers to those signals that are transferred on a bus or other readily accessible signal line. Details of the instruction, such as its impact on specific resources within the graphics controller, are generally not accessible to these analyzers, and more sophisticated operations, such as detecting concurrent events involving non-external signals, are precluded with logic analyzers. These devices are also relatively expensive and complex to operate, limiting their use to engineers who design and debug the hardware.
Various programmable logic devices (PLDs) can also be used to monitor the operation of system hardware. These are usually designed for specific hardware devices and are complex to use. In addition, PLDs, like logic analyzers only have access to external signals.
There is thus a need for a transparent system capable of monitoring graphics hardware at a sufficiently detailed level to provide meaningful feedback on device performance without need for complex interfacing and analysis procedures.